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ISR

Interrupt Service Routine: This is a routine, for VxWorks usually written in C, that actually handles an interrupt from a device. Unlike normal task-level code, ISRs are subject to a number of restrictions. For more information on this see The Kernel - Interrupts and the VxWorks Programmer's Guide.

MMU

Memory Management Unit: The most flexible of the hardware memory protection systems. MMUs break the memory into pages, and allow for both mappings and access rights on a per-page basis. The size of the pages can typically be selected from a number of options. Additionally, there may be a larger unit (sometimes called a segment) that can be used to map large contiguous blocks of physical address space that will share the same attributes.

MPU

Memory Protection Unit: Simpler protection units, sometimes referred to as base and bound protection units. These will typically have a small number of regions that are specified by a start address and size. The size is usually specified as a multiple of a relatively large unit size. Each region can be assigned its own attributes for cacheability and accessibility.

NMI

Non-Maskable Interrupt: A non-maskable interrupt is, as its name suggests, an interrupt that cannot be blocked by software. This makes them both useful in that they have a guaranteed shortest possible latency, and dangerous in that they can interrupt critical sections of the kernel. VxWorks, in order to maintain the minimum possible latency does not use them at all. System architects are free to use them, but should be aware that NMI handlers must not call kernel routines. See The Kernel - Interrupts for more information.

PCI Class Code

PCI Device ID

PCI Vendor ID

PIC

Programmable Interrupt Controller: A device for multiplexing interrupt sources, and managing masking and prioritisation of interrupts within a system. These can be found inside the CPU, in the chipset components or as standalone components (very rare these days). For more information see The Kernel - Interrupts and the documentation for your BSP.

-- JohnGordon - 26 Apr 2003